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Product Specification

  • High-performance, Low-power Atmel AVR 8-bit Microcontroller  
  • Advanced RISC Architecture ̶ 131 Powerful Instructions
  • Most Single-clock Cycle Execution
  • 32 x 8 General Purpose Working Registers
  • Fully Static Operation
  • Up to 16MIPS Throughput at 16MHz
  • On-chip 2-cycle Multiplier
  • High Endurance Non-volatile Memory segments
  • 16KBytes of In-System Self-programmable Flash program memory
  • 512Bytes EEPROM
  • 1KByte Internal SRAM
  • Write/Erase Cycles: 10,000 Flash/100,000 EEPROM
  • Data retention: 20 years at 85°C/100 years at 25°C(1)
  • Optional Boot Code Section with Independent Lock Bits
  •  In-System Programming by On-chip Boot Program
  •  True Read-While-Write Operation
  • Programming Lock for Software Security
  •  Special Microcontroller Features
  • Power-on Reset and Programmable Brown-out Detection
  • Internal Calibrated RC Oscillator
  • External and Internal Interrupt Sources
  • Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and Extended Standby
  • I/O and Packages
  • 32 Programmable I/O Lines
  • 40-pin PDIP, 44-lead TQFP, and 44-pad QFN/MLF
  • Operating Voltages
  • 2.7 - 5.5V
  • Speed Grades
  • 0 - 16MHz z Power Consumption @ 1MHz, 3V, and 25°C
  • Active: 0.6mA
  • Idle Mode: 0.2mA
  • Power-down Mode: < 1µA
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Product Details

32 general purpose working registers are combined with a robust instruction set in the Atmel AVR core. Since each of the 32 registers is directly coupled to the ALU, two separate registers may be accessed in a single instruction that is executed in a single clock cycle. In comparison to traditional CISC microcontrollers, the resultant design is quicker and more code-efficient.

The following capabilities are offered by the ATmega16A: 32 general purpose I/O lines, 32 general purpose working registers, a JTAG interface for boundary-scan, on-chip programming support, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial programmable USART, a byte-oriented Two-wire Serial Interface, an 8-channel, 10-bit ADC with optional different sampling rates, and 16Kbytes of in-system programmable flash programme memory with read-while-write capabilities.

The USART, Two-wire interface, A/D Converter, SRAM, Timer/Counters, SPI port, and interrupt system may all continue to operate when the CPU is in idle mode. The Oscillator is frozen in the Power-down mode, but the register values are saved. Until the next External Interrupt or Hardware Reset, all chip operations are disabled. While the rest of the device is resting in power-save mode, the Asynchronous Timer keeps running, enabling the user to maintain a timer basis. To reduce switching noise during ADC conversions, the ADC Noise Reduction mode turns down the CPU and all other I/O modules except the Asynchronous Timer and ADC. While the rest of the device is sleeping in standby mode, the crystal/resonator oscillator is operating. As a result, highly quick startup and low power consumption are both possible.


Mr. Arpit Mehta


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